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MVP ECC : Manufacturing process variation aware unequal protection ECC for memory reliability

Authors
Lee, S.[Lee, S.]Yang, J.-S.[Yang, J.-S.]
Issue Date
2017
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
Error correction code; Manufacturing process variation; Unequal protection code
Citation
Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017, pp.846 - 851
Journal Title
Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017
Start Page
846
End Page
851
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/33476
DOI
10.23919/DATE.2017.7927105
Abstract
With a development of process technology, a memory density has been increased. However, a smaller feature size makes the memory susceptible to soft errors. For reliability enhancement, ECC with single bit error correction and double bit error detection is widely used. As multiple bit cell upset become dominant, there is a need for stronger ECC. ECC such as RS or BCH code requires significantly large overhead and longer latency. To overcome the problem, this paper introduces an unequal protection ECC assigning stronger level of protection to weak memory cells and normal level to normal cells. Information from manufacturing characterization test is utilized to identify weak memory cells with low design margins. Instead of equally treating all memory cells, the proposed ECC focuses more on the weak cells since they are more susceptible to soft errors. Compared to conventional ECCs, experimental results show that the proposed ECC considerably enhances memory reliability with the same code length. © 2017 IEEE.
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Information and Communication Engineering > Department of Semiconductor Systems Engineering > 1. Journal Articles

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