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Cited 2 time in webofscience Cited 2 time in scopus
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Improvement of the short channel effect in PMOSFETs using cold implantation

Authors
Lee, SH[Lee, Suk Hun]Park, SG[Park, Se Geun]Jeong, SH[Jeong, Seong Hoon]Jung, HC[Jung, Hyuck-Chai]Kim, IG[Kim, Il Gweon]Kang, DH[Kang, Dong-Ho]Nam, HJ[Nam, Hyo-Jik]Kim, DJ[Kim, Dae Jung]Lee, KP[Lee, Kyu Pil]Choi, JS[Choi, Joo Sun]Jung, W[Jung, Woosuk]Park, Y[Park, Yongkook]Choi, C[Choi, Changhwan]Park, JH[Park, Jin-Hong]
Issue Date
Oct-2016
Publisher
PERGAMON-ELSEVIER SCIENCE LTD
Keywords
Semiconductor; Electronic materials; Diffusion; Defect; Electrical properties
Citation
MATERIALS RESEARCH BULLETIN, v.82, pp.31 - 34
Indexed
SCIE
SCOPUS
Journal Title
MATERIALS RESEARCH BULLETIN
Volume
82
Start Page
31
End Page
34
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/35069
DOI
10.1016/j.materresbull.2016.02.027
ISSN
0025-5408
Abstract
In this paper, to suppress transient enhanced dopant diffusion and improve short channel effects, cold implantation (cold-IIP) was applied to contact PLUG implantation in P-channel metal oxide semiconductor field effect transistors (PMOSFETs). A shallow dopant profile was formed by the suppression of transient enhanced diffusion (TED) due to the reduction of end-of-range (EOR) defects. Threshold voltage roll-off and off current (I-off) increment, which are caused by a reduction in the distance between the gate and contact, were improved compared with room temperature implantation (RT-IIP). Additionally, the drain induced barrier lowering was improved, and the on-current improvement was attributed to reducing the contact resistance through the reduction of EOR defects. The contact resistance was reduced by similar to 6% of the RT-IIP. In the DRAM device, the standby current at a short propagation delay time (t(pD)) was reduced effectively due to the decrease in the Ice and contact resistance for the cold-IIP case. (C) 2016 Elsevier Ltd. All rights reserved.
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