Design of a Wide-Frequency-Range, Low-Power Transceiver with Automatic Impedance-Matching Calibration for TV-White-Space Application
- Authors
- Lee, D[Lee, DongSoo]; Lee, J[Lee, Juri]; Park, HG[Park, Hyung-Gu]; Choi, J[Choi, JinWook]; Park, S[Park, SangHyeon]; Kim, I[Kim, InSeong]; Pu, Y[Pu, YoungGun]; Kim, J[Kim, JaeYoung]; Hwang, KC[Hwang, Keum Cheol]; Yang, Y[Yang, Youngoo]; Seo, M[Seo, Munkyo]; Lee, KY[Lee, Kang-Yoon]
- Issue Date
- Feb-2016
- Publisher
- IEEK PUBLICATION CENTER
- Keywords
- TVWS transceiver; automatic impedance-matching calibration; drive amplifier; SPDT; N-path filter; LNA; phase-locked loop (PLL)
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.16, no.1, pp.126 - 142
- Indexed
- SCIE
SCOPUS
KCI
- Journal Title
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
- Volume
- 16
- Number
- 1
- Start Page
- 126
- End Page
- 142
- URI
- https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/38135
- DOI
- 10.5573/JSTS.2016.16.1.126
- ISSN
- 1598-1657
- Abstract
- This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal S-22 and S-11 matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in 0.13 mu m, 1-poly, 6-metal CMOS technology. The die area of the transceiver is 4 mm x 3 mm. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is + 10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.
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- Appears in
Collections - Information and Communication Engineering > School of Electronic and Electrical Engineering > 1. Journal Articles
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