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Low power FSK transceiver using ADPLL with direct modulation and integrated SPDT for BLE application

Authors
Lee, D.[Lee, D.]Oh, S.[Oh, S.]Kim, S.[Kim, S.]Lee, C.[Lee, C.]Song, C.[Song, C.]Kim, J.[Kim, J.]Kim, W.[Kim, W.]Kim, H.[Kim, H.]Yoo, S.-S.[ Yoo, S.-S.]Hong, S.[ Hong, S.]Lee, J.-W.[ Lee, J.-W.]Pu, Y.[Pu, Y.]Lee, K.-Y.[Lee, K.-Y.]
Issue Date
2016
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
ADPLL; BLE; FSK transciever; low power; SPDT
Citation
2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings, pp.113 - 116
Journal Title
2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings
Start Page
113
End Page
116
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/40075
DOI
10.1109/ASSCC.2016.7844148
Abstract
This paper presents a low power FSK transceiver with ADPLL based on direct modulation and integrated SPDT switch for Bluetooth low energy application. To ensure that the proposed low power transceiver can operate at 1 Mbps data rate, FSK modulation is implemented using an all-digital phase locked-loop with direct modulation technique. The SPDT switch is integrated to share the antenna and matching network between the transmitter and receiver, thus minimizing the system cost by reducing external components. The transceiver is implemented using 1P6M 55-nm CMOS technology. The die area of the transceiver with DC-DC converter is 1.79 mm2. The power consumption of the transmitter and receiver are 6 and 5 mW, respectively, when the output power level of the transmitter is 0 dBm. The noise figure of Rx is up to 6.8 dB with respect to channel frequencies. The phase noise of the ADPLL is -84.7 and -118.9 dBc/Hz at 100 kHz and 1 MHz offset from 2.44 GHz, respectively. © 2016 IEEE.
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Information and Communication Engineering (Electronic and Electrical Engineering)
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