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Cited 8 time in webofscience Cited 10 time in scopus
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All-Digital Bandwidth Mismatch Calibration of TI-ADCs Based on Optimally Induced Minimization

Authors
Tavares, YA[Tavares, Yang Azevedo]Lee, KY[Lee, Kang-Yoon]Lee, M[Lee, Minjae]
Issue Date
May-2020
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Bandwidth; Calibration; Hardware; Time-frequency analysis; Numerical models; Cutoff frequency; Very large scale integration; All-digital calibration; analog-to-digital converter (ADC); bandwidth calibration; derivative; time interleaving (TI)
Citation
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.28, no.5, pp.1175 - 1184
Indexed
SCIE
SCOPUS
Journal Title
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Volume
28
Number
5
Start Page
1175
End Page
1184
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/4743
DOI
10.1109/TVLSI.2020.2974549
ISSN
1063-8210
Abstract
The problem of parameter mismatch in time-interleaved-analog-to-digital converters (TI-ADCs) has become a significant concern to guarantee output linearity. Several solutions have been presented for offset, gain, time skew, and bandwidth mismatches, but they can rely on hardware expensive methods. This article proposes an all-digital calibration algorithm for the TI-ADC bandwidth mismatch, which is capable of detecting the optimal correction coefficients for the derivative-based digital filters. The analyzed convergence logic further relaxes the hardware requirements. Moreover, numerical simulations and experimental results validate the calibration efficiency. A commercial 12-bit 3.6-GS/s two-channel TI-ADC was used to verify the proposed calibration algorithm under real conditions.
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