A New Method for Defect Prediction of Polycrystalline Silicon TFTs with Realistic Grain Boundary Model

Abstract

We investigate the deviation of threshold voltage (V-th) of p-channel polycrystalline silicon thin film transistors (poly-Si TFTs) using a new GB (grain boundary) model that better reflects reality. And we proposed new method for defect prediction using by this new GB model. The new GB model reflects a gaussian distribution of grain size and GB position. And by introducing a new parameter (beta) which represents the defect ratio between GB and grain, the V-th deviation that increases as the channel gets shorter can be matched with the actual measurement results. And we found that the increase in the V-th deviation in the short channel becomes larger as the number of defects increases in GB (as the beta increases). And we found that the beta is an important physical parameter to explain why the V-th deviation of the short channel is rapidly increased. In this way, using this beta value in our GB model, it is possible to predict the relative density of defect states of GB in the poly-Si by monitoring the V-th deviation in short channel TFTs in the process of developing polycrystalline TFTs.