Experimental Evaluation of the Effect of Pad Debris Size on Microscratches during CMP Process
- Authors
- Yang, JC[Yang, Ji Chul]; Kim, H[Kim, Hojoong]; Oh, DW[Oh, Dong Won]; Won, JH[Won, Jai-Hyung]; Lee, CG[Lee, Chil-Gee]; Kim, T[Kim, Taesung]
- Issue Date
- Jan-2013
- Publisher
- SPRINGER
- Keywords
- Chemical-mechanical planarization; microscratch; p
- Citation
- JOURNAL OF ELECTRONIC MATERIALS, v.42, no.1, pp.97 - 102
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF ELECTRONIC MATERIALS
- Volume
- 42
- Number
- 1
- Start Page
- 97
- End Page
- 102
- URI
- https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/61901
- DOI
- 10.1007/s11664-012-2334-9
- ISSN
- 0361-5235
- Abstract
- Polishing debris generated by pad surface conditioning has been suspected as a major source of microscratches in the chemical-mechanical planarization (CMP) process. In this study, we investigated the pad debris generated by an in situ conditioning process during oxide CMP as one of the major scratch sources. We evaluated the relationship between the size of pad debris and the shape of microscratches on a wafer to find the cause of scratches. Pad debris was gathered in real time during the polishing process. Then, by transmission electron microscopy we observed a mixed layer of pad material and abrasive particles on the surface of the pad debris and the pad surface, which hardened the pad debris and pad surface. The results reveal a size range of pad debris that led to a minimum scratch count. Pad debris size smaller or larger than the minimum scratch region seems to cause higher scratch count due to the hardened pad surface and pad debris.
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Collections - Software > Software > 1. Journal Articles
- Engineering > School of Mechanical Engineering > 1. Journal Articles
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