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A 1.3-mW per-channel 103-dB SNR stereo audio DAC with class-D head-phones amplifier in 65nm CMOS
- Authors
- Lee, Y.-H.; Seok, C.-K.; Kim, B.-J.; You, S.-B.; Yeum, W.-S.; Park, H.-J.; Jun, Y.-H.; Kong, B.-S.; Kim, J.-W.
- Issue Date
- 2008
- Keywords
- Audio DAC; Delta sigma and asymmetric PWM
- Citation
- IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp 166 - 167
- Pages
- 2
- Indexed
- SCOPUS
- Journal Title
- IEEE Symposium on VLSI Circuits, Digest of Technical Papers
- Start Page
- 166
- End Page
- 167
- Abstract
- The stereo audio DAC with novel single-ended class-D amplifier achieving a 103-dB SNR is fully integrated in a 65nm CMOS technology. Novel asymmetric pulse-width modulation (PWM) is applied to minimize switching noise and nonlinearity in the class-D amplifier. The adjustable delta-sigma modulator is also used to suppress supply-voltage modulation. All the functions needed for portable audio playback are implemented in a 0.53-mm2 area dissipating only 1.3-mW per channel from a 2.5-V supply. © 2008 IEEE.
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Related Researcher
- KONG, BAI SUN
- Information and Communication Engineering (Semiconductor Systems Engineering)