CMOS Device Design with Ferroelectric Materials
- Authors
- Shin, C.[Shin, C.]
- Issue Date
- 2021
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Citation
- China Semiconductor Technology International Conference 2021, CSTIC 2021
- Indexed
- SCOPUS
- Journal Title
- China Semiconductor Technology International Conference 2021, CSTIC 2021
- URI
- https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/93121
- DOI
- 10.1109/CSTIC52283.2021.9461588
- ISSN
- 0000-0000
- Abstract
- Complementary metal oxide semiconductor (CMOS) device has been successfully evolved with innovative techniques, e.g., stress engineering, high-klmetal-gate, three-dimensional device structure, for the past a few decades. As a new pathway, the adoption of ferroelectric materials in gate stack of CMOS device has been received lots of attention. In this work, the device design guidelines for ferroelectric-gated CMOS device are to be discussed. © 2021 IEEE.
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Collections - Information and Communication Engineering > School of Electronic and Electrical Engineering > 1. Journal Articles
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