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Optimal test capacity allocation in automated high-frequency testing environments

Authors
Han, Yong-HeeKo, Sung-Seok
Issue Date
Sep-2012
Publisher
SPRINGER LONDON LTD
Keywords
High-frequency testing; Binning; Substitution; Downgrading; Semiconductor test
Citation
INTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY, v.62, no.1-4, pp.213 - 220
Journal Title
INTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY
Volume
62
Number
1-4
Start Page
213
End Page
220
URI
http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/12345
DOI
10.1007/s00170-011-3768-6
ISSN
0268-3768
Abstract
This paper discusses characteristics unique in the two-phase high-frequency-testing (HFT) environment in semiconductor manufacturing. We believe this paper is the first to define, formalize, and analyze the decision making problem associated with the two-phase HFT. Specifically, this paper defines the problem of minimizing the total HFT capacity usage by systematically finding the optimal number of preliminary HFT bin-1 chips subject to the main HFT, with the existence of the target service rate. We also propose a heuristic algorithm that exploits the special structure of the problem for efficiently obtaining a near-optimal solution. Finally, a numerical analysis and a case study have been conducted to gain more insights on the problem structure and the proposed algorithm.
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