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A 1.8-GHz CMOS Power Amplifier Using Stacked nMOS and pMOS Structures for High-Voltage Operation
- Authors
- Son, Ki Yong; Park, Changkun; Hong, Songcheol
- Issue Date
- Nov-2009
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Cascode amplifiers; CMOS; differential; power amplifiers; transformers
- Citation
- IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.57, no.11, pp.2652 - 2660
- Journal Title
- IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
- Volume
- 57
- Number
- 11
- Start Page
- 2652
- End Page
- 2660
- ISSN
- 0018-9480
- Abstract
- A class-E power amplifier is proposed in this study. It uses both nMOS and pMOS as switching devices to reduce the voltage stress of each transistor. A voltage-combining scheme with nMOS and pMOS is proposed, and a transformer is designed using this scheme. The power amplifier is implemented in a 0.18-mu m RF CMOS process. Measurements show a maximum output power of 30.2 dBm with 36.8% power-added efficiency at a 3.3-V supply voltage. The power amplifier sustains a supply voltage of up to 3.9 V.
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Related Researcher
- Park, Chang kun
- College of Information Technology (Department of Electronic Engineering)