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RLC 연결선의 축소모형을 이용한 지연시간 계산방법A Delay Estimation Method using Reduced Model of RLC Interconnects
- Other Titles
- A Delay Estimation Method using Reduced Model of RLC Interconnects
- Issue Date
- Aug-2005
- Publisher
- 대한전기학회
- Keywords
- RLC Delay; Interconnect Delay; Inductance; Reduced Model; Equivalent Elmore Delay
- Citation
- 전기학회논문지 C권, v.54, no.8(C), pp.350 - 354
- Journal Title
- 전기학회논문지 C권
- Volume
- 54
- Number
- 8(C)
- Start Page
- 350
- End Page
- 354
- ISSN
- 1229-246X
- Abstract
- This paper proposes a new method for delay time calculation in RLC interconnects. This method is simple, but precise. The proposed method can calculate delay time of RLC interconnects by simple numerical formula calculation without complex moment calculation using reduced model in RLC interconnects. The results using the proposed method for RLC circuits show that average relative error is within 10% in comparison with HSPICE simulation results.
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Related Researcher
- Kim, Seok Yoon
- College of Information Technology (School of Computer Science and Engineering)