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Highly Linear and Efficient 5.8 GHz CMOS Power Amplifier with Adaptive Bias Control and 2nd Harmonic Termination Circuit

Authors
서철헌
Issue Date
Oct-2007
Publisher
I․E․E․K
Citation
International SoC Design Conference, pp.535 - 538
URI
http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/29294
Conference Name
International SoC Design Conference
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