A novel recovery data technique on MLC NAND flash memory
- Authors
- Dai T.V.; Park J.; Park D.-J.
- Issue Date
- Dec-2019
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Data recovery; Flash memory; FTL; PLR
- Citation
- Proceedings of 2019 11th International Conference on Knowledge and Systems Engineering, KSE 2019
- Journal Title
- Proceedings of 2019 11th International Conference on Knowledge and Systems Engineering, KSE 2019
- URI
- http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/35490
- DOI
- 10.1109/KSE.2019.8919382
- ISSN
- 0000-0000
- Abstract
- Flash memory today is more popular because of its advantages, such as low power consumption, high mobility and fast data access. In NAND flash memory, a solution called Flash Translation Layer (FTL) was proposed to solve its disadvantages like erase-before-write and unsymmetrical read or write response time. During the process of using the data, the data might be lost on the power failure in the systems. In some systems, the data is very important. Hence, recovery of data in the event of the system crash or a sudden power outage is of prime importance. One of the methods to fix is the error code correction (ECC), supplied with the flash device by the manufacturer. In the process of power off failure recovery, there have been previous schemes such as In-Page Backup, In-Block Backup, Hybrid Backup, A-PLR (Accumulation based Power Loss Recovery), HYFLUR (Hybrid FLUsh Recovery), and C-HYFLUR (Compression scheme for HYFLUR). In this paper, we introduce a technique based on the page leveling mapping using the spare area in FTL divided into ECC, map information, and reserved. To estimate the performance of this technique, we compare the recovery time and mapping information management cost of our approach with those of previous schemes such as In-Block Backup and In-Page Backup. © 2019 IEEE.
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