Accelerating Memory Access with Address Phase Skipping in LPDDR2-NVM
- Authors
- Park, Jaehyun; Shin, Dongwha; Chang, Naehyuck; Lee, Hyung Gyu
- Issue Date
- Dec-2014
- Publisher
- 대한전자공학회
- Keywords
- Phase-change memory; LPDDR2-NVM; main memory; address phase skipping; system-level implementation
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.14, no.6, pp.741 - 749
- Journal Title
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
- Volume
- 14
- Number
- 6
- Start Page
- 741
- End Page
- 749
- URI
- http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/39442
- ISSN
- 1598-1657
- Abstract
- Low power double data rate 2 non-volatile memory (LPDDR2-NVM) has been deemed the standard interface to connect non-volatile memory devices such as phase-change memory (PCM) directly to the main memory bus. However, most of the previous literature does not consider or overlook this standard interface. In this paper, we propose address phase skipping by reforming the way of interfacing with LPDDR2-NVM. To verify effectiveness and functionality, we also develop a system-level prototype that includes our customized LPDDR2-NVM controller and commercial PCM devices. Extensive simulations and measurements demonstrate up to a 3.6% memory access time reduction for commercial PCM devices and a 31.7% reduction with optimistic parameters of the PCM research prototypes in industries.
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