Hybrid Non-Volatile Flip-Flops Using Spin-Orbit-Torque (SOT) Magnetic Tunnel Junction Devices for High Integration and Low Energy Power-Gating Applications
- Authors
- Park, Jaeyoung
- Issue Date
- Sep-2020
- Publisher
- MDPI
- Keywords
- flip-flop; magnetic tunnel junction; spin-orbit-torque; spin-transfer torque; power-gating
- Citation
- ELECTRONICS, v.9, no.9
- Journal Title
- ELECTRONICS
- Volume
- 9
- Number
- 9
- URI
- http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/39837
- DOI
- 10.3390/electronics9091406
- ISSN
- 2079-9292
- Abstract
- This paper presents two novel hybrid non-volatile flip-flops (NVFFs) comprised of the conventional CMOS flip-flop for static storage in normal operations and Spin-Orbit-Torque Magnetic Tunnel Junction (SOT-MTJ) devices for temporary storage during power gating. The proposed NVFFs re-utilize a part of the standard CMOS flip-flop infrastructure for storing and restoring data onto MTJs for reducing the area. Furthermore, the proposed NVFFs re-use a write current, which is used for storing an MTJ, to write the other MTJ at a time, resulting in 50% storing energy reduction. To reduce the area further, the number of external terminals of an MTJ is reduced by shorting the shorting physical terminals. Removing a terminal using the proposed STT-Like SOT configuration results in fewer transistors to control. The proposed NVFF circuits are evaluated using a compact MTJ model targeting implementation in a 14-nm technology node. Analysis indicates that area overheads are only 10.3% and 6.9% compared to the conventional D flip-flop because three or two minimum-sized NMOS transistors are added for accessing MTJs. Compared to the best previously known NVFFs, the proposed NVFF has an improvement by a factor of 2-8 in terms of the area overhead.
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