A comparative study of charge trapping effect in p-type MoTe2 and WSe2 FETs using pulsed current-voltage measurements
DC Field | Value | Language |
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dc.contributor.author | Yang, Jeong Yong | - |
dc.contributor.author | Lee, Chan Ho | - |
dc.contributor.author | Oh, Young Taek | - |
dc.contributor.author | Ma, Jiyeon | - |
dc.contributor.author | Heo, Junseok | - |
dc.contributor.author | Yoo, Geonwook | - |
dc.date.available | 2021-03-04T01:40:21Z | - |
dc.date.created | 2021-03-04 | - |
dc.date.issued | 2021-01-01 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.uri | http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/40377 | - |
dc.description.abstract | P-type semiconductors are indispensable for achieving complementary metal oxide semiconductor and integrated circuits based on two-dimensional (2D) semiconductors, and tungsten diselenide (WSe2) and molybdenum ditelluride (MoTe2) are the promising channel materials for PMOS. In this work, we report on the charge trapping effects on hysteretic behavior and field-effect mobility (mu(FE)) of the p-type WSe2 and MoTe2 FETs using fast pulsed current-voltage (I-V) measurements. The hysteresis is reduced by nearly 98% via ramped pulsed measurements, and mu(FE) is significantly enhanced via single pulse measurements by minimizing the charge trapping. Moreover, WSe2 FETs are found to be more susceptible to the charge trapping effects compared with MoTe2 FETs; WSe2 FETs exhibit more pronounced enhancement of mu(FE) and reduction of hysteresis. The intrinsic electrical characteristics of p-type 2D FETs under minimized charge trapping conditions can be investigated using the pulsed I-V characterizations. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IOP PUBLISHING LTD | - |
dc.relation.isPartOf | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
dc.title | A comparative study of charge trapping effect in p-type MoTe2 and WSe2 FETs using pulsed current-voltage measurements | - |
dc.type | Article | - |
dc.identifier.doi | 10.35848/1347-4065/abd6d5 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | JAPANESE JOURNAL OF APPLIED PHYSICS, v.60, no.1 | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000606019600001 | - |
dc.identifier.scopusid | 2-s2.0-85099249233 | - |
dc.citation.number | 1 | - |
dc.citation.title | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
dc.citation.volume | 60 | - |
dc.contributor.affiliatedAuthor | Yoo, Geonwook | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.subject.keywordAuthor | PMOS | - |
dc.subject.keywordAuthor | WSe2 | - |
dc.subject.keywordAuthor | MoTe2 | - |
dc.subject.keywordAuthor | charge trapping | - |
dc.subject.keywordAuthor | pulse I-V | - |
dc.subject.keywordPlus | INTEGRATED-CIRCUITS | - |
dc.subject.keywordPlus | HYSTERESIS | - |
dc.subject.keywordPlus | TRANSISTORS | - |
dc.subject.keywordPlus | LOGIC | - |
dc.subject.keywordPlus | GRAPHENE | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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