FTRM: A Cache-Based Fault Tolerant Recovery Mechanism for Multi-Channel Flash Devices
DC Field | Value | Language |
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dc.contributor.author | Mativenga, Ronnie | - |
dc.contributor.author | Hamandawana, Prince | - |
dc.contributor.author | Chung, Tae-Sun | - |
dc.contributor.author | Kim, Jongik | - |
dc.date.available | 2021-04-16T07:40:17Z | - |
dc.date.created | 2021-04-16 | - |
dc.date.issued | 2020-10 | - |
dc.identifier.issn | 2079-9292 | - |
dc.identifier.uri | http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/40761 | - |
dc.description.abstract | Flash memory prevalence has reached greater extents with its performance and compactness capabilities. This enables it to be easily adopted as storage media in various portable devices which includes smart watches, cell-phones, drones, and in-vehicle infotainment systems to mention but a few. To support large flash storage in such portable devices, existing flash translation layers (FTLs) employ a cache mapping table (CMT), which contains a small portion of logical page number to physical page number (LPN-PPN) mappings. For robustness, it is of importance to consider the CMT reconstruction mechanisms during system recovery. Currently, existing approaches cannot overcome the performance penalty after experiencing unexpected power failure. This is due to the disregard of the delay caused by inconsistencies between the cached page-mapping entries in RAM and their corresponding mapping pages in flash storage. Furthermore, how to select proper pages for reconstructing the CMT when rebooting a device needs to be revisited. In this study we address these problems and propose a fault tolerant power-failure recovery mechanism (FTRM) for flash memory storage systems. Our empirical study shows that FTRM is an efficient recovery and robust protocol. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | MDPI | - |
dc.relation.isPartOf | ELECTRONICS | - |
dc.title | FTRM: A Cache-Based Fault Tolerant Recovery Mechanism for Multi-Channel Flash Devices | - |
dc.type | Article | - |
dc.identifier.doi | 10.3390/electronics9101581 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | ELECTRONICS, v.9, no.10 | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000585384200001 | - |
dc.citation.number | 10 | - |
dc.citation.title | ELECTRONICS | - |
dc.citation.volume | 9 | - |
dc.contributor.affiliatedAuthor | Hamandawana, Prince | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.subject.keywordAuthor | cache memory | - |
dc.subject.keywordAuthor | flash memory | - |
dc.subject.keywordAuthor | fast boot | - |
dc.subject.keywordAuthor | fault tolerance | - |
dc.subject.keywordAuthor | multiple channel | - |
dc.subject.keywordPlus | TRANSLATION LAYER | - |
dc.subject.keywordPlus | SPACE | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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