The Design of a 0.15 ps High Resolution Time-to-Digital Converter
DC Field | Value | Language |
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dc.contributor.author | Lee, Jongsuk | - |
dc.contributor.author | Moon, Yong | - |
dc.date.available | 2018-05-09T07:35:16Z | - |
dc.date.created | 2018-04-17 | - |
dc.date.issued | 2015-06 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | http://scholarworks.bwise.kr/ssu/handle/2018.sw.ssu/8727 | - |
dc.description.abstract | This research outlines the design of a HR-TDC (High Resolution Time-to-Digital Converter) for high data rate communication systems using a 0.18 mu m CMOS process. The coarse-fine architecture has been adopted to improve the resolution of the TDC. A two-stage vernier time amplifier (2S-VTA) was used to amplify the time residue, and the gain of the 2S-VTA was larger than 64. The error during time amplification was compensated using two FTDCs (Fine-TDC) with their outputs. The resolution of the HR-TDC was 0.15 ps with a 12-bit output and the power consumption was 4.32 mW with a 1.8-V supply voltage. | - |
dc.publisher | IEEK PUBLICATION CENTER | - |
dc.relation.isPartOf | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.subject | COARSE | - |
dc.subject | CMOS | - |
dc.subject | TDC | - |
dc.title | The Design of a 0.15 ps High Resolution Time-to-Digital Converter | - |
dc.type | Article | - |
dc.identifier.doi | 10.5573/JSTS.2015.15.3.334 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.15, no.3, pp.334 - 341 | - |
dc.identifier.kciid | ART002001267 | - |
dc.description.journalClass | 1 | - |
dc.identifier.wosid | 000366060900003 | - |
dc.identifier.scopusid | 2-s2.0-84936764811 | - |
dc.citation.endPage | 341 | - |
dc.citation.number | 3 | - |
dc.citation.startPage | 334 | - |
dc.citation.title | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.volume | 15 | - |
dc.contributor.affiliatedAuthor | Moon, Yong | - |
dc.type.docType | Article | - |
dc.description.oadoiVersion | published | - |
dc.subject.keywordAuthor | TDC | - |
dc.subject.keywordAuthor | TA (Time Amplifier) | - |
dc.subject.keywordAuthor | vernier delay line | - |
dc.subject.keywordAuthor | DPLL (Digital Phase Locked Loop) | - |
dc.subject.keywordAuthor | high data rate communication | - |
dc.subject.keywordPlus | COARSE | - |
dc.subject.keywordPlus | CMOS | - |
dc.subject.keywordPlus | TDC | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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