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Cited 7 time in webofscience Cited 10 time in scopus
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Gate Driving Circuit With Active Pull-Down Function for a Solid-State Pulsed Power Modulator

Authors
Yu, Chan-HunJang, Sung-RocKim, Hyoung-SukRyoo, Hong-Je
Issue Date
Jan-2018
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Fast falling time; gate driving circuit; pulsed power applications; solid-state pulsed power modulator (SSPPM)
Citation
IEEE TRANSACTIONS ON POWER ELECTRONICS, v.33, no.1, pp 240 - 247
Pages
8
Journal Title
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume
33
Number
1
Start Page
240
End Page
247
URI
https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/1335
DOI
10.1109/TPEL.2017.2673000
ISSN
0885-8993
1941-0107
Abstract
This paper proposes a new gate driving circuit for the solid-state pulsed power modulator (SSPPM) based on semiconductor devices. The proposed circuit can be easily implemented by applying a short gate signal to the bypass insulated gate bipolar transistor (IGBT), i.e., switches connected in parallel with the load instead of a pull-down resistor. The IGBT_BPs are turned ON at the end-point of the pulse. It can quickly discharge the pulse voltage applied to the load. In addition, it can operate as bypass diode, which is used to protect the semiconductor switches when the gate signal malfunctions, by using the antiparallel diode of the IGBT. Moreover, power loss in the pull-down resistor used to achieve fast falling pulses can be eliminated by turning OFF the IGBT while applying the pulse state. Thus, the proposed circuit can be used for implementing SSPPM with small values of falling time and high efficiency. The circuit configuration, operational principle, relevant analysis results, and a PSpice modeling are presented and verified by the 10-kV SSPPM.
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공과대학 (에너지시스템 공학부)
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