A 5-20 GHz 5-Bit True Time Delay Circuit in 0.18 mu m CMOS Technology

Abstract

This paper presents a 5-bit true time delay circuit using a standard 0.18 mu m CMOS process for the broadband phased array antenna without the beam squint. The maximum time delay of similar to 106 ps with the delay step of similar to 3.3 ps is achieved at 5-20 GHz. The RMS group delay and amplitude errors are <1 ps and <2 dB, respectively. The measured insertion loss is <27 dB and the input and output return losses are <12 dB at 5-15 GHz. The current consumption is nearly zero with 1.8 V supply. The chip size is 1.04 x 0.85 mm(2) including pads.