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Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge

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dc.contributor.authorHong, B. H.-
dc.contributor.authorCho, N.-
dc.contributor.authorLee, S. J.-
dc.contributor.authorYu, Y. S.-
dc.contributor.authorChoi, L.-
dc.contributor.authorJung, Y. C.-
dc.contributor.authorCho, K. H.-
dc.contributor.authorYeo, K. H.-
dc.contributor.authorKim, D. -W.-
dc.contributor.authorJin, G. Y.-
dc.contributor.authorOh, K. S.-
dc.contributor.authorPark, D.-
dc.contributor.authorSong, S. -H.-
dc.contributor.authorRieh, J. -S.-
dc.contributor.authorHwang, S. W.-
dc.date.available2019-05-29T11:36:23Z-
dc.date.issued2011-09-
dc.identifier.issn0741-3106-
dc.identifier.issn1558-0563-
dc.identifier.urihttps://scholarworks.bwise.kr/cau/handle/2019.sw.cau/21284-
dc.description.abstractWe measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.-
dc.format.extent3-
dc.language영어-
dc.language.isoENG-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleSubthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge-
dc.typeArticle-
dc.identifier.doi10.1109/LED.2011.2159473-
dc.identifier.bibliographicCitationIEEE ELECTRON DEVICE LETTERS, v.32, no.9, pp 1179 - 1181-
dc.description.isOpenAccessN-
dc.identifier.wosid000294171600005-
dc.identifier.scopusid2-s2.0-80052037094-
dc.citation.endPage1181-
dc.citation.number9-
dc.citation.startPage1179-
dc.citation.titleIEEE ELECTRON DEVICE LETTERS-
dc.citation.volume32-
dc.type.docTypeArticle-
dc.publisher.location미국-
dc.subject.keywordAuthorGate-all-around (GAA)-
dc.subject.keywordAuthorinterface trap charge-
dc.subject.keywordAuthorsilicon nanowire field-effect transistor (SNWFET)-
dc.subject.keywordAuthorsubthreshold degradation-
dc.subject.keywordPlusFILM SOI MOSFETS-
dc.subject.keywordPlusTHIN-FILM-
dc.subject.keywordPlusSIMULATION-
dc.subject.keywordPlusMODEL-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.description.journalRegisteredClasssci-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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