An MDDI-host architecture with low complexity for SoC platforms

Abstract

This paper proposes a low-complexity Mobile Display Digital Interface (MMDI) architecture. We implement and verify the proposed MMDI-host architecture on a System-on-Chip (SoQ platform with a 32-bit RISC CPU and a FPGA module. As a result of verification, the gate count of the MDDI host is reduced by about 50 % compared to that of the conventional parallel interface. And the bandwidth per pin of the MMDI host is 3 times more than that of a conventional parallel interface. Furthermore, the MDDI host that we implement includes the Advanced High-performance Bus (AHB) interface. Therefore, the proposed MMDI architecture is suitable for SoC platforms.