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A Diacnosable Network-on-Chip for FPGA Verification of Intellectual Properties
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Han, Kyuseung | - |
| dc.contributor.author | Lee, Jae-Mu | - |
| dc.contributor.author | Lee, Woojoo | - |
| dc.contributor.author | Lee, Jinho | - |
| dc.date.accessioned | 2021-06-18T07:28:58Z | - |
| dc.date.available | 2021-06-18T07:28:58Z | - |
| dc.date.issued | 2019-03 | - |
| dc.identifier.issn | 2168-2356 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/44866 | - |
| dc.description.abstract | Editor's note: Debug and validation are important steps required to ensure that systems-on-chip satisfies the design specs. This article presents an elegant diagnosis technique integrated within the network-on-chip infrastructure. The authors demonstrate the proposed technique on an FPGA prototype.-Umit Y. Ogras, Arizona State University © 2013 IEEE. | - |
| dc.format.extent | 7 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | A Diacnosable Network-on-Chip for FPGA Verification of Intellectual Properties | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1109/MDAT.2018.2890238 | - |
| dc.identifier.bibliographicCitation | IEEE DESIGN & TEST, v.36, no.2, pp 81 - 87 | - |
| dc.description.isOpenAccess | N | - |
| dc.identifier.wosid | 000464913400007 | - |
| dc.identifier.scopusid | 2-s2.0-85059419870 | - |
| dc.citation.endPage | 87 | - |
| dc.citation.number | 2 | - |
| dc.citation.startPage | 81 | - |
| dc.citation.title | IEEE DESIGN & TEST | - |
| dc.citation.volume | 36 | - |
| dc.type.docType | Article | - |
| dc.publisher.location | 미국 | - |
| dc.subject.keywordAuthor | debugging | - |
| dc.subject.keywordAuthor | FPGA verification | - |
| dc.subject.keywordAuthor | Network-on-chip | - |
| dc.subject.keywordPlus | REUSE | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
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