K-means Clustering-specific Lightweight RISC-V processor
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, W. | - |
dc.contributor.author | Park, J. | - |
dc.contributor.author | Byun, C. | - |
dc.contributor.author | Choi, E. | - |
dc.contributor.author | Lee, J.-H. | - |
dc.contributor.author | Lee, W. | - |
dc.contributor.author | Byun, K.J. | - |
dc.contributor.author | Han, K. | - |
dc.date.accessioned | 2023-03-08T10:13:22Z | - |
dc.date.available | 2023-03-08T10:13:22Z | - |
dc.date.issued | 2021-10 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/62138 | - |
dc.description.abstract | While the demand for edge devices performing K-means clustering algorithm is expected to explode, this paper introduces a K-means clustering-specific processor for edge devices. The processor consists of hardware to accelerate the K-means algorithm and lightweight RISC-V core, and functional validation has been completed through RTL simulation and FPGA prototyping. The processor prototype demonstrates its excellence by performing the K-means algorithm about 56 times faster. © 2021 IEEE. | - |
dc.format.extent | 2 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | K-means Clustering-specific Lightweight RISC-V processor | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/ISOCC53507.2021.9613863 | - |
dc.identifier.bibliographicCitation | Proceedings - International SoC Design Conference 2021, ISOCC 2021, pp 391 - 392 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000861550500166 | - |
dc.identifier.scopusid | 2-s2.0-85123386114 | - |
dc.citation.endPage | 392 | - |
dc.citation.startPage | 391 | - |
dc.citation.title | Proceedings - International SoC Design Conference 2021, ISOCC 2021 | - |
dc.type.docType | Proceedings Paper | - |
dc.subject.keywordAuthor | acclerator | - |
dc.subject.keywordAuthor | K-means clustering | - |
dc.subject.keywordAuthor | RISC-V processor | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scopus | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
84, Heukseok-ro, Dongjak-gu, Seoul, Republic of Korea (06974)02-820-6194
COPYRIGHT 2019 Chung-Ang University All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.