Resistive random-access memory with an a-Si/SiNx double-layer
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kwon, Hui Tae | - |
dc.contributor.author | Lee, Won Joo | - |
dc.contributor.author | Choi, Hyun-Seok | - |
dc.contributor.author | Wee, Daehoon | - |
dc.contributor.author | Park, Yu Jeong | - |
dc.contributor.author | Kim, Boram | - |
dc.contributor.author | Kim, Min-Hwi | - |
dc.contributor.author | Kim, Sungjun | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.contributor.author | Kim, Yoon | - |
dc.date.accessioned | 2024-02-19T02:30:48Z | - |
dc.date.available | 2024-02-19T02:30:48Z | - |
dc.date.issued | 2019-08 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.issn | 1879-2405 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/72122 | - |
dc.description.abstract | Resistive random-access memory (RRAM) with a Ni/SiNx/a-Si/p(+)-Si structure is presented. In contrast to RRAM devices based on high-k materials, the proposed Si-based device is more attractive and promising because the SiNx and a-Si layers have full compatibility with conventional complementary metal-oxidesemiconductor technology. The proposed device is compared to a control device with a single layer of SiNx. A conduction path containing Si dangling bonds (traps) can be generated in both the SiNx and a-Si layers. The conduction path in each layer can be controlled by the compliance current during the forming process. For high compliance current mode, the double-layer device has a higher ON/OFF ratio (similar to 10(4)) and lower leakage current (similar to 10(-9) A) than the single-layer device. For low compliance current mode, better non-linearity (similar to 10(3)) can be obtained when a 1/2 read bias scheme is applied to the cross-point array. | - |
dc.format.extent | 6 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.title | Resistive random-access memory with an a-Si/SiNx double-layer | - |
dc.type | Article | - |
dc.identifier.doi | 10.1016/j.sse.2019.05.014 | - |
dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.158, pp 64 - 69 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000469851900010 | - |
dc.identifier.scopusid | 2-s2.0-85066110808 | - |
dc.citation.endPage | 69 | - |
dc.citation.startPage | 64 | - |
dc.citation.title | SOLID-STATE ELECTRONICS | - |
dc.citation.volume | 158 | - |
dc.type.docType | Article | - |
dc.publisher.location | 영국 | - |
dc.subject.keywordAuthor | Resistive random-access memory (RRAM) | - |
dc.subject.keywordAuthor | Silicon nitride (Si3N4) | - |
dc.subject.keywordAuthor | MIS (Metal-Insulator-Semiconductor) RRAM | - |
dc.subject.keywordPlus | MECHANISM | - |
dc.subject.keywordPlus | STORAGE | - |
dc.subject.keywordPlus | DEVICE | - |
dc.subject.keywordPlus | RRAM | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
84, Heukseok-ro, Dongjak-gu, Seoul, Republic of Korea (06974)02-820-6194
COPYRIGHT 2019 Chung-Ang University All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.