Gradual bipolar resistive switching in Ni/Si3N4/n+-Si resistive-switching memory device for high-density integration and low-power applications
DC Field | Value | Language |
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dc.contributor.author | Kim, Sungjun | - |
dc.contributor.author | Jung, Sunghun | - |
dc.contributor.author | Kim, Min-Hwi | - |
dc.contributor.author | Cho, Seongjae | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.date.accessioned | 2024-02-19T05:00:31Z | - |
dc.date.available | 2024-02-19T05:00:31Z | - |
dc.date.issued | 2015-12 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.issn | 1879-2405 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/72163 | - |
dc.description.abstract | In this work, we report a gradual bipolar resistive switching memory device using Ni/Si(3)N(4/)n(+)-Si structure. Different reset transitions are observed depending on compliance current (I-COMP). The reset switching becomes abrupt around I-COMP = 10 mA, while gradual reset switching with fine controllability is preserved for the devices with I-COMP < 1 mA. We demonstrate multi-level cell (MLC) operation through the modulation of conducting path by controlling I-COMP and reset stop voltage (V-STOP) for I-COMP < 1 mA. For the devices with I-COMP = 10 mA, low resistance state (LRS) shows Ohmic behavior with metallic conducting paths, while high resistance state (HRS) shows non-Ohmic behavior. Also, it is revealed that LRS and HRS conductions follow space-charge-limited current (SCLC) mechanism in low I-COMP regime (I-COMP < 1 mA). (C) 2015 Elsevier Ltd. All rights reserved. | - |
dc.format.extent | 4 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.title | Gradual bipolar resistive switching in Ni/Si3N4/n+-Si resistive-switching memory device for high-density integration and low-power applications | - |
dc.type | Article | - |
dc.identifier.doi | 10.1016/j.sse.2015.08.003 | - |
dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.114, pp 94 - 97 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000363193300017 | - |
dc.identifier.scopusid | 2-s2.0-84940489689 | - |
dc.citation.endPage | 97 | - |
dc.citation.startPage | 94 | - |
dc.citation.title | SOLID-STATE ELECTRONICS | - |
dc.citation.volume | 114 | - |
dc.type.docType | Article | - |
dc.publisher.location | 영국 | - |
dc.subject.keywordAuthor | Si3N4-based RRAM | - |
dc.subject.keywordAuthor | Resistive switching | - |
dc.subject.keywordAuthor | Abrupt reset | - |
dc.subject.keywordAuthor | Gradual reset | - |
dc.subject.keywordAuthor | Multi-level cell (MLC) | - |
dc.subject.keywordAuthor | Space-charge-limited current (SCLC) | - |
dc.subject.keywordPlus | MECHANISM | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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