A 860.8-nW Low-Power Continuous-Time Delta-Sigma Modulator With Switched Resistors for Sensor Applications
- Authors
- Kim, Jaedo; Shin, Hwaseong; Na, Sangwook; Duan, Quanzhen; Roh, Jeongjin
- Issue Date
- Jul-2023
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Continuous-time delta-sigma modulation; operational transconductance amplifier low-power consumption; switched resistor
- Citation
- 2023 IEEE International Symposium on Circuits and Systems (ISCAS), v.2023-May, pp 1 - 5
- Pages
- 5
- Indexed
- SCOPUS
- Journal Title
- 2023 IEEE International Symposium on Circuits and Systems (ISCAS)
- Volume
- 2023-May
- Start Page
- 1
- End Page
- 5
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/115130
- DOI
- 10.1109/ISCAS46773.2023.10181932
- ISSN
- 0271-4310
- Abstract
- In this paper, we present a 860.8-nW low-power third-order single-bit continuous-time delta-sigma modulator (CTDSM) for sensor applications. The proposed CTDSM decrease the power consumption of the first integrator OTA by reducing the equivalent load capacitor of the first integrator using the switched resistor technique. Unlike conventional CTDSMs, switched resistor technique can reduce the size of resistors and capacitors used as integrator coefficients by using clock duties of 25% and 75%. This method solves the problem of resistor and capacitor sizing in CTDSMs that have a low-frequency signal bandwidth. The proposed low-power CTDSM exhibits a peak signal-to-noise ratio (SNR) of 85.6 dB, a peak signal-to-noise and distortion ratio (SNDR) of 84.1 dB, and a total power consumption of 860.8 nW using a 1.6 V power supply. In addition, the simulation results revealed an SNDR of up to 84.1 dB at a sampling frequency rate of 64 kHz for a 250-Hz signal bandwidth. The circuit was designed and simulated using the 0.18-μm CMOS process. © 2023 IEEE.
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