Detailed Information
Cited 0 time in 
Cited 0 time in 
Cited 0 time in
Metadata Downloads
BPPT - Bulk potential protection technique for hardened sequentials
Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Nofal, I | - |
| dc.contributor.author | Evans, A. | - |
| dc.contributor.author | He, A.-L. | - |
| dc.contributor.author | Guo, G. | - |
| dc.contributor.author | Li, Yuanqing | - |
| dc.contributor.author | Chen, L. | - |
| dc.contributor.author | Liu, R. | - |
| dc.contributor.author | Wang, H.-B. | - |
| dc.contributor.author | Chen, M. | - |
| dc.contributor.author | Baeg, S.H. | - |
| dc.contributor.author | Wen, S.-J. | - |
| dc.contributor.author | Wong, R. | - |
| dc.date.accessioned | 2021-06-22T15:22:44Z | - |
| dc.date.available | 2021-06-22T15:22:44Z | - |
| dc.date.issued | 2017-07 | - |
| dc.identifier.issn | 0000-0000 | - |
| dc.identifier.issn | 1942-9401 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/11592 | - |
| dc.description.abstract | In this paper, we present a method for hardening memory and sequential cells against soft errors. The effect of the ionizing particle on the bulk potential is exploited to prevent the induced SET from propagating in the circuit. The proposed method requires a minimum number of extra transistors. The solution is applied to D Flip-Flop design, and alpha and heavy-ions test results are presented. © 2017 IEEE. | - |
| dc.format.extent | 5 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | BPPT - Bulk potential protection technique for hardened sequentials | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/IOLTS.2017.8046194 | - |
| dc.identifier.scopusid | 2-s2.0-85032741116 | - |
| dc.identifier.wosid | 000427164200009 | - |
| dc.identifier.bibliographicCitation | 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, pp 28 - 32 | - |
| dc.citation.title | 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017 | - |
| dc.citation.startPage | 28 | - |
| dc.citation.endPage | 32 | - |
| dc.type.docType | Conference Paper | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Theory & Methods | - |
| dc.subject.keywordPlus | Flip flop circuits | - |
| dc.subject.keywordPlus | Hardening | - |
| dc.subject.keywordPlus | Heavy ions | - |
| dc.subject.keywordPlus | Radiation hardening | - |
| dc.subject.keywordPlus | Systems analysis | - |
| dc.subject.keywordPlus | D flip flops | - |
| dc.subject.keywordPlus | Ionizing particles | - |
| dc.subject.keywordPlus | Pass transistors | - |
| dc.subject.keywordPlus | Protection techniques | - |
| dc.subject.keywordPlus | Single event | - |
| dc.subject.keywordPlus | Single event transients | - |
| dc.subject.keywordPlus | Single event upsets | - |
| dc.subject.keywordPlus | Soft error | - |
| dc.subject.keywordPlus | Transients | - |
| dc.subject.keywordAuthor | Hardening | - |
| dc.subject.keywordAuthor | LET | - |
| dc.subject.keywordAuthor | Pass transistors | - |
| dc.subject.keywordAuthor | SER | - |
| dc.subject.keywordAuthor | Single event transient | - |
| dc.subject.keywordAuthor | Single event upset | - |
| dc.subject.keywordAuthor | Single events | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/8046194 | - |
- Files in This Item
- Go to Link
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
Related Researcher
- Baeg, Sanghyeon
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)