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Analysis of ADC Quantization Effect in Processing-In-Memory Macro in Various Low-Precision Deep Neural Networks
- Authors
- Jin, Seung-Mo; Kang, Shin-Uk; Choo, Min-Seong
- Issue Date
- Jan-2024
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Analog to digital conversion (ADC); convolutional neural networks (CNN); deep neural networks (DNN); multilayer perceptron (MLP); processing in memory (PIM); static-random access memory (SRAM); ternary and binary networks (TBN)
- Citation
- 2024 International Conference on Electronics, Information, and Communication (ICEIC), pp 1 - 2
- Pages
- 2
- Indexed
- SCOPUS
- Journal Title
- 2024 International Conference on Electronics, Information, and Communication (ICEIC)
- Start Page
- 1
- End Page
- 2
- ISSN
- 0000-0000
- Abstract
- This paper introduces a method for adjusting flash ADC levels, focusing on ternary inputs and binary weights (1, -1) and (1, 0), to improve test accuracy in DNN and CNN models. It proposes two approaches for mapping bitline voltages with noise in PIM macro to MAC values to optimize ADC levels: rough tuning, which linearly maps MAC values, and fine-tuning, which maps the range of MAC values determined through rough tuning in a new way. Additionally, it demonstrates that this approach can enhance test accuracy for ternary inputs without requiring the highest possible flash ADC levels, providing insights into the direction of PIM macro design. © 2024 IEEE.
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Related Researcher
- Choo, Min Seong
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)