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A Robust DT Σ Modulator for High-Resolution Sensor Against Temperature Variations
- Authors
- Choi, Jihun; Na, Sangwook; Kim, Taehun; Roh, Jeongjin
- Issue Date
- Nov-2024
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Analog-to-digital converter (ADC); discrete-time delta-sigma modulator (DTDSM); feedback digital-to-analog converter (DAC)
- Citation
- Proceedings - International SoC Design Conference 2024, ISOCC 2024, pp 75 - 76
- Pages
- 2
- Indexed
- SCOPUS
- Journal Title
- Proceedings - International SoC Design Conference 2024, ISOCC 2024
- Start Page
- 75
- End Page
- 76
- ISSN
- 2163-9612
- Abstract
- This paper presents a 1-bit third-order delta-sigma modulator for high-resolution sensors. By sharing digital-to-analog converter (DAC) and sampling capacitors, we mitigate the influence of KT/C noise, while enhancing resolution through a chopping technique and internal feedback loop. The prototype chip is fabricated in a 28-nm CMOS process with an area of 0.122 mm2. It achieves a peak signal-to-noise ratio (SNR) of 83.6 dB and a peak signal-to-noise and distortion ratio (SNDR) of 81.6 dB in a 20 kHz signal bandwidth while consuming 13.3 mW from a 1.8 V power supply. © 2024 IEEE.
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Related Researcher
- Roh, Jeong jin
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)