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Heterogeneous 3-D Sequential CFET With Strain-Engineered Ge (100) Top-Channel pMOSFET on Bulk Si (100) nMOSFET

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dc.contributor.authorLim, Hyeongrak-
dc.contributor.authorKim, Seong Kwang-
dc.contributor.authorLee, Seung Woo-
dc.contributor.authorPark, Youngkeun-
dc.contributor.authorJeong, Jaejoong-
dc.contributor.authorJeong, Hojin-
dc.contributor.authorLim, Jinha-
dc.contributor.authorGeum, Dae-Myeong-
dc.contributor.authorHan, Jaehoon-
dc.contributor.authorKim, Younghyun-
dc.contributor.authorJeong, Jaeyong-
dc.contributor.authorCho, Byung Jin-
dc.contributor.authorKim, Sanghyeon-
dc.date.accessioned2025-06-20T02:00:16Z-
dc.date.available2025-06-20T02:00:16Z-
dc.date.issued2025-06-
dc.identifier.issn0018-9383-
dc.identifier.issn1557-9646-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/125672-
dc.description.abstractIn this work, we first demonstrated heterogeneous 3-D (H3D) sequential complementary field-effect transistors (seqCFETs) highlighting biaxially compressively strained Ge (sGe) (100) channel, which potentially solves a critical bottleneck in CFET development: high mobility top strained p-channel limited by the difficulty of SiGe stressor growth. Leveraging high-quality heteroepitaxial growth and direct wafer bonding (DWB), we achieved similar to 0.6% biaxially compressively sGe on a 6-in Si wafer by growing Ge virtual substrate, Si0.5Ge0.5 stressor/etch stopper, and sGe channel layer. Finally, we first demonstrated the H3D seqCFET with biaxially compressively sGe (100) p-channel MOSFETs, featuring good voltage transfer curve (VTC) characteristics with high voltage gain (V-gain) of 51 V/V at supply voltage (V-DD) = 1.25 V. We believe that the sGe channel realized by the method shown in this work will be a very promising technology to realize high-performance vertically 3-D stacked CFET in the future.-
dc.format.extent7-
dc.language영어-
dc.language.isoENG-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleHeterogeneous 3-D Sequential CFET With Strain-Engineered Ge (100) Top-Channel pMOSFET on Bulk Si (100) nMOSFET-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TED.2025.3574116-
dc.identifier.scopusid2-s2.0-105007515340-
dc.identifier.wosid001504164200001-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.72, no.7, pp 1 - 7-
dc.citation.titleIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.citation.volume72-
dc.citation.number7-
dc.citation.startPage1-
dc.citation.endPage7-
dc.type.docTypeArticle; Early Access-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusTRANSPORT-
dc.subject.keywordAuthorGe-on-insulator (Ge-OI)-
dc.subject.keywordAuthorheterogeneous 3-D sequential CFETs (H3D seqCFETs)-
dc.subject.keywordAuthormonolithic 3-D (M3D) integration-
dc.subject.keywordAuthorMOSFETs-
dc.subject.keywordAuthorstrained Ge (sGe)-
dc.subject.keywordAuthorwafer bonding-
dc.identifier.urlhttps://xplorestaging.ieee.org/document/11023020?denied=-
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ERICA 첨단융합대학 (ERICA 반도체·디스플레이공학전공)
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