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Heterogeneous 3-D Sequential CFET With Strain-Engineered Ge (100) Top-Channel pMOSFET on Bulk Si (100) nMOSFET

Authors
Lim, HyeongrakKim, Seong KwangLee, Seung WooPark, YoungkeunJeong, JaejoongJeong, HojinLim, JinhaGeum, Dae-MyeongHan, JaehoonKim, YounghyunJeong, JaeyongCho, Byung JinKim, Sanghyeon
Issue Date
Jun-2025
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Ge-on-insulator (Ge-OI); heterogeneous 3-D sequential CFETs (H3D seqCFETs); monolithic 3-D (M3D) integration; MOSFETs; strained Ge (sGe); wafer bonding
Citation
IEEE TRANSACTIONS ON ELECTRON DEVICES, v.72, no.7, pp 1 - 7
Pages
7
Indexed
SCIE
SCOPUS
Journal Title
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume
72
Number
7
Start Page
1
End Page
7
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/125672
DOI
10.1109/TED.2025.3574116
ISSN
0018-9383
1557-9646
Abstract
In this work, we first demonstrated heterogeneous 3-D (H3D) sequential complementary field-effect transistors (seqCFETs) highlighting biaxially compressively strained Ge (sGe) (100) channel, which potentially solves a critical bottleneck in CFET development: high mobility top strained p-channel limited by the difficulty of SiGe stressor growth. Leveraging high-quality heteroepitaxial growth and direct wafer bonding (DWB), we achieved similar to 0.6% biaxially compressively sGe on a 6-in Si wafer by growing Ge virtual substrate, Si0.5Ge0.5 stressor/etch stopper, and sGe channel layer. Finally, we first demonstrated the H3D seqCFET with biaxially compressively sGe (100) p-channel MOSFETs, featuring good voltage transfer curve (VTC) characteristics with high voltage gain (V-gain) of 51 V/V at supply voltage (V-DD) = 1.25 V. We believe that the sGe channel realized by the method shown in this work will be a very promising technology to realize high-performance vertically 3-D stacked CFET in the future.
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ERICA 첨단융합대학 (ERICA 반도체·디스플레이공학전공)
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