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Balancing Yield and Makespan in Wafer Fabrication: A Two-Stage Data-Driven Scheduling Approach

Authors
김현준스테판바르드김민걸이창호
Issue Date
Jun-2025
Publisher
대한산업공학회
Keywords
Hybrid flow shop schedulingWafer fabricationTwo-stage data-driven scheduling methodologyHybrid metaheuristic optimizationProductivity-quality trade-off
Citation
대한산업공학회지, pp 1273 - 1287
Pages
15
Indexed
KCI
Journal Title
대한산업공학회지
Start Page
1273
End Page
1287
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/126385
DOI
10.1016/j.jmsy.2025.07.009
ISSN
1225-0988
2234-6457
Abstract
In semiconductor manufacturing, achieving high quality and productivity remains a challenging task due to the complexity and variability of multistage production processes. This study addresses the hybrid flow shop scheduling problem (HFSP) in wafer fabrication, targeting the inherent trade-off between quality (yield) and productivity (makespan). We propose a two-stage data-driven scheduling framework that integrates historical manufacturing data. In the first stage, sequential patterns are mined using the PrefixSpan algorithm and are statistically validated. Based on their yield, patterns are classified and recombined via rule-based filtering to derive plausible high-quality (PHQ) paths. In the second stage, the PHQ path-based HFSP is formulated and solved using GAInS, a hybrid metaheuristic framework that incorporates Genetic Algorithm (GA), Iterated Local Search, and Simulated Annealing. Computational experiments across various wafer counts ( = 5, 15, 25, 50) demonstrate that GAInS consistently outperforms Mixed Integer Linear Programming, Constraint Programming models, and basic GA approaches in minimizing makespan while maintaining high yield. Compared to an existing method in the literature that combines regression-based yield prediction with GA-based scheduling, the proposed approach achieves superior Pareto solutions by better balancing quality and productivity. These findings highlight the potential of the proposed framework in balancing critical objectives in wafer fabrication.
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ERICA 공학대학 (DEPARTMENT OF INDUSTRIAL & MANAGEMENT ENGINEERING)
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