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Multi Stage Noise Shaping Delta-Sigma Modulator

Authors
이재성노정진
Issue Date
Oct-2016
Publisher
한국과학기술원 반도체설계교육센터
Citation
IDEC Journal of Integrated Circuits and Systems, v.2, no.3, pp 14 - 19
Pages
6
Indexed
KCI
Journal Title
IDEC Journal of Integrated Circuits and Systems
Volume
2
Number
3
Start Page
14
End Page
19
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/15058
Abstract
This paper presents a multi stage noise shaping (MASH) delta-sigma modulator (DSM) for high speed data signal processing. This delta-sigma modulator (DSM) is discrete-time modulator (DT) and sampling of the input signal occurs prior to the loop filter. Discrete-time (DT) modulator has lower performance degradation from excess loop delay, clock jitter, process variation than Continuous-time (CT) modulator. A 4-Phase buck converter is used to supply power in delta-sigma modulator (DSM). The delta-sigma modulator (DSM) power supply is 1.8V. The buck converter has low EMI using spread spectrum. To implement spread spectrum, the paper proposes random clock generator. The buck converter supply voltage 3V and Output voltage is 1.8V. Switching frequency ranges from 7 to 9 MHz and Maximum load current is 500mA. The delta-sigma modulator (DSM) and buck converter is fabricated in 0.18㎛ CMOS process and circuit type is Mixed-design.
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COLLEGE OF ENGINEERING SCIENCES > SCHOOL OF ELECTRICAL ENGINEERING > 1. Journal Articles

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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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