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Slurry free lapping of silicon wafer for the application of thinning of wafer backside during TSV and packaging

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dc.contributor.authorMoon, Deog ju-
dc.contributor.authorYerriboina, Nagendra Prasad-
dc.contributor.authorCho, Si hyeong-
dc.contributor.authorPark, Sung ho-
dc.contributor.authorSeo, Young gil-
dc.contributor.authorPark, Jin-Goo-
dc.date.accessioned2021-06-22T18:22:13Z-
dc.date.available2021-06-22T18:22:13Z-
dc.date.issued2016-02-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/15991-
dc.description.abstractIn the semiconductor industry, the thinning of wafer is carried out by back grinding in two steps; coarse grinding and fine grinding. In this work, a new slurry free abrasive pad was developed to perform the thinning process of Si wafers with a single lapping step to achieve higher removal rate and lower roughness. Different lapping pads were prepared with the diamond agglomerates containing different primary size of the diamonds (2, 5 and 10μm). Two different shapes (spherical and irregular) of agglomerates were prepared and evaluated their lapping performance. The lapping was performed at different pressure conditions to obtain optimum lapping performance. From the results it was found that irregular shaped agglomerated pad could show better performance than the spherical shaped agglomerates. Increase of primary size of the diamond increases the removal rate and also roughness. From the results optimum condition was selected for the achieving the better performance. © 2015 American Vacuum Society.-
dc.format.extent3-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleSlurry free lapping of silicon wafer for the application of thinning of wafer backside during TSV and packaging-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.scopusid2-s2.0-84964434867-
dc.identifier.wosid000380410600066-
dc.identifier.bibliographicCitation2015 International Conference on Planarization/CMP Technology, ICPT 2015, pp 1 - 3-
dc.citation.title2015 International Conference on Planarization/CMP Technology, ICPT 2015-
dc.citation.startPage1-
dc.citation.endPage3-
dc.type.docTypeConference Paper-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Chemical-
dc.relation.journalWebOfScienceCategoryEngineering, Mechanical-
dc.subject.keywordPlusAgglomeration-
dc.subject.keywordPlusDiamonds-
dc.subject.keywordPlusGrinding (machining)-
dc.subject.keywordPlusLapping-
dc.subject.keywordPlusSemiconductor device manufacture-
dc.subject.keywordPlusSilicon wafers-
dc.subject.keywordPlusThree dimensional integrated circuits-
dc.subject.keywordPlusWide band gap semiconductors-
dc.subject.keywordPlusDifferent pressures-
dc.subject.keywordPlusDifferent shapes-
dc.subject.keywordPlusFine grinding-
dc.subject.keywordPlusFree abrasive-
dc.subject.keywordPlusOptimum conditions-
dc.subject.keywordPlusRemoval rate-
dc.subject.keywordPlusSemiconductor industry-
dc.subject.keywordPlusThinning process-
dc.subject.keywordPlusElectronics packaging-
dc.identifier.urlhttps://ieeexplore.ieee.org/abstract/document/7412033-
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