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A Novel Model of HVDC Hybrid-Type Superconducting Circuit Breaker and Its Performance Analysis for Limiting and Breaking DC Fault Currents

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dc.contributor.authorKhan, Umer Amir-
dc.contributor.authorLee, Jong-Geon-
dc.contributor.authorAmir, Faisal-
dc.contributor.authorLee, Bang-Wook-
dc.date.accessioned2021-06-22T18:42:13Z-
dc.date.available2021-06-22T18:42:13Z-
dc.date.issued2015-12-
dc.identifier.issn1051-8223-
dc.identifier.issn1558-2515-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/16478-
dc.description.abstractThe key obstacle in integrating high-voltage direct current (HVDC) point-to-point networks into meshed multiterminal HVDC networks (MTDC) is the absence of dc circuit breakers (DCCBs), which can timely and reliably isolate the faulty HVDC network from the MTDC. In this paper, a novel hybrid-type superconducting DCCB model (SDCCB) is proposed. The SDCCB has a superconducting fault current limiter (SFCL) located in the main line, to limit the fault current until the final trip signal to the SDCCB is given. After the trip signal, insulated-gate bipolar transistor (IGBT) switches located in the main line will commutate the fault current into a parallel line, where dc current is forced to zero by combination of IGBTs and surge arresters. DC fault current behavior in MTDC and fundamental requirements of DCCB for MTDC were described, followed by an explanation of the working principles of the SDCCB. To prove the viability of the SDCCB, a simulation analysis demonstrating SDCCB current interruption performance was done for changing the intensity of dc fault current. It was observed that the passive current limiting by SFCL caused significant reduction in fault current interruption stress for SDCCB. Furthermore, fundamental design requirements for SFCL, including the effect of SFCL quenching impedance on SFCL voltage rating and energy dissipation capacity, were investigated. Finally, advantages and limitations of the SDCCB were highlighted.-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleA Novel Model of HVDC Hybrid-Type Superconducting Circuit Breaker and Its Performance Analysis for Limiting and Breaking DC Fault Currents-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TASC.2015.2477373-
dc.identifier.scopusid2-s2.0-84944097688-
dc.identifier.wosid000389758600001-
dc.identifier.bibliographicCitationIEEE Transactions on Applied Superconductivity, v.25, no.6-
dc.citation.titleIEEE Transactions on Applied Superconductivity-
dc.citation.volume25-
dc.citation.number6-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClasssci-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusCURRENT LIMITERS-
dc.subject.keywordAuthorHigh-voltage direct current (HVDC) circuit breaker (DCCB)-
dc.subject.keywordAuthorhybrid DCCB (HDCCB)-
dc.subject.keywordAuthormultiterminal HVDC-
dc.subject.keywordAuthorsuperconducting fault current limiter (SFCL)-
dc.subject.keywordAuthorvoltage source converters (VSC)-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/7247671-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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