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A 0.4 V 63 mu W 76.1 dB SNDR 20 kHz Bandwidth Delta-Sigma Modulator Using a Hybrid Switching Integrator

Authors
Yoon, YounghyunChoi, DanbiRoh, Jeongjin
Issue Date
Oct-2015
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Hybrid switching integrator; low-power deltasigma modulator
Citation
IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.10, pp.2342 - 2352
Indexed
SCIE
SCOPUS
Journal Title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume
50
Number
10
Start Page
2342
End Page
2352
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/17024
DOI
10.1109/JSSC.2015.2468857
ISSN
0018-9200
Abstract
This paper presents a delta-sigma modulator operating at a supply voltage of 0.4 V. The designed delta-sigma modulator uses a proposed hybrid switching integrator and operates at a low supply voltage without clock boosting or bootstrapped switches. The proposed integrator consists of both switched-resistor and switched-capacitor operations and significantly reduces distortion at a low supply voltage. Variation in the turn-on resistance, which is the main source of distortion, is avoided by placing the switches at the virtual ground node of the amplifier. The proposed low-voltage design scheme can replace commonly-used clock boosting techniques, which rely on internal high-voltage generation circuits. A fabricated modulator achieves a 76.1 dB signal-to-noise-plus-distortion ratio (SNDR) and an 82 dB dynamic range at a 20 kHz bandwidth. The measured total power consumption is 63 mu W from a 0.4 V supply voltage. The measured results show robust SNDR performance, even at +/- 10% supply voltage variations. The measured results also show stable performance over a wide temperature range.
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Roh, Jeong jin
ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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