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A Study on Fault Current Stress Analysis for HVDC Circuit Breakers in Multi-terminal HVDC GridHVDC 다중 터미널 계통의 DC차단기 개발을 위한 고장전류 스트레스 분석에 관한 연구

Other Titles
HVDC 다중 터미널 계통의 DC차단기 개발을 위한 고장전류 스트레스 분석에 관한 연구
Authors
Khan, Umer AmirLee, Jong-GunLim, Sung-WooLee, Bang-Wook
Issue Date
Jul-2014
Publisher
대한전기학회
Citation
2014 대한전기학회 하계학술대회, pp 372 - 373
Pages
2
Indexed
OTHER
Journal Title
2014 대한전기학회 하계학술대회
Start Page
372
End Page
373
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/22402
Abstract
Multi-terminal High Voltage DC (HVDC) grids (MTDC) is a promising solution for coping up with increasing demand of electric power by integrating distant renewable energy resources with existing AC networks. Protection of such networks through HVDC circuit breakers (DCCB) is the most important factor in ensuring their reliability and continuity of service. This paper presents a study on the relationship of increasing number of converter stations in MTDC networks and their effect on the fault current interruption requirement of DCCBs. Fault analysis for various MTDC networks were performed through simulations and fault current stress for DCCB was analyzed. Moreover, the paper also illustrates the importance of DCCB response time and its bidirectional blocking capability requirement when installed in a HVDC line.
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COLLEGE OF ENGINEERING SCIENCES > SCHOOL OF ELECTRICAL ENGINEERING > 1. Journal Articles

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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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