Capacitor-Coupled Built-Off Self-Test in Analog and Mixed-Signal Embedded Systems
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Byoungho | - |
dc.contributor.author | Abraham, Jacob A. | - |
dc.date.accessioned | 2021-06-23T03:42:01Z | - |
dc.date.available | 2021-06-23T03:42:01Z | - |
dc.date.issued | 2013-05 | - |
dc.identifier.issn | 1549-7747 | - |
dc.identifier.issn | 1558-3791 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/28368 | - |
dc.description.abstract | Design-for-test (DfT) circuitry that employs differential terminals inherently suffers from an imbalance in the output of its differential pair. By providing the imbalanced differential test stimulus from the DfT circuitry, nonlinearity is eventually introduced in a differential mixed-signal circuit under test, resulting in low test accuracy and significant yield loss during production testing. Consequently, in only rare cases are attempts made to measure dynamic performance of differential mixed-signal circuits using a self-test approach. This brief suggests an efficient testing technique based on built-off self-test for differential analog and mixed-signal circuits. This technique precisely predicts individual device-under-test (DUT) specifications by resolving the imbalance problem using simple variable capacitors in loopback mode. The variable capacitor generates predefined imbalances to give different weights on the spectral loopback responses. Nonlinear models are derived to characterize the DUT specifications using the differently weighted loopback responses. The hardware measurement results can be used to validate that the proposed method should be able to replace the conventional test method. | - |
dc.format.extent | 5 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Capacitor-Coupled Built-Off Self-Test in Analog and Mixed-Signal Embedded Systems | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/TCSII.2013.2251953 | - |
dc.identifier.scopusid | 2-s2.0-84877873910 | - |
dc.identifier.wosid | 000319226200005 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.60, no.5, pp 257 - 261 | - |
dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.citation.volume | 60 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 257 | - |
dc.citation.endPage | 261 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | LOOPBACK TEST | - |
dc.subject.keywordAuthor | Analog-to-digital converter (ADC) | - |
dc.subject.keywordAuthor | differential mixed-signal testing | - |
dc.subject.keywordAuthor | digital-to-analog converter (DAC) | - |
dc.subject.keywordAuthor | loopback test | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/6488774 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
55 Hanyangdeahak-ro, Sangnok-gu, Ansan, Gyeonggi-do, 15588, Korea+82-31-400-4269 sweetbrain@hanyang.ac.kr
COPYRIGHT © 2021 HANYANG UNIVERSITY. ALL RIGHTS RESERVED.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.