Extraction Technique for Intrinsic Subgap DOS in a-IGZO TFTs by De-Embedding the Parasitic Capacitance Through the Photonic C-V Measurement
- Authors
- Bae, Hagyoul; Choi, Hyunjun; Oh, Saeroonter; Kim, Dae Hwan; Bae, Jonguk; Kim, Jaehyeong; Kim, Yun Hyeok; Kim, Dong Myong
- Issue Date
- Jan-2013
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Amorphous; extraction; overlap capacitance; parasitic capacitance; parasitic effect; subgap density of states (DOS); thin-film transistors (TFTs)
- Citation
- IEEE ELECTRON DEVICE LETTERS, v.34, no.1, pp.57 - 59
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ELECTRON DEVICE LETTERS
- Volume
- 34
- Number
- 1
- Start Page
- 57
- End Page
- 59
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/29227
- DOI
- 10.1109/LED.2012.2222014
- ISSN
- 0741-3106
- Abstract
- We report a technique for extraction of the intrinsic subgap density of states (gA,(int)(E)) by deembedding the parasitic capacitance in amorphous indium-gallium-zinc-oxide TFTs through the optical charge pumping method. As structure-dependent parameters in the proposed extraction technique, the overlap length L-ov between the source/drain (S/D) and the active layer and the parasitic overlap area between the gate and the S/D metal (C-par,C-S/C-par,C-D) are considered under dark and subbandgap photonic states. We obtained g(A,int)(E) as a superposition of the exponential deep and tail states with N-TA,N-int = 6.0x10(16) eV(-1) . cm(-3), kT(TA,int) = 0.16 eV, N-DA,N-int = 1.8 x 10(15) eV(-1) . cm(-3), and kT(DA,int) = 1.9 eV from samples with various parasitic areas.
- Files in This Item
-
Go to Link
- Appears in
Collections - COLLEGE OF ENGINEERING SCIENCES > SCHOOL OF ELECTRICAL ENGINEERING > 1. Journal Articles
![qrcode](https://api.qrserver.com/v1/create-qr-code/?size=55x55&data=https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/29227)
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.