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Analytical Eye-Diagram Determination for the Efficient and Accurate Signal Integrity Verification of Single Interconnect Lines

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dc.contributor.authorKim, Dongchul-
dc.contributor.authorKim, Hyewon-
dc.contributor.authorEo, Yungseon-
dc.date.accessioned2021-06-23T06:26:52Z-
dc.date.available2021-06-23T06:26:52Z-
dc.date.issued2012-10-
dc.identifier.issn0278-0070-
dc.identifier.issn1937-4151-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/31825-
dc.description.abstractIn this paper, a new efficient and accurate analytical eye-diagram determination technique for interconnect lines is presented. The simplest input test signal model for the intersymbol interference analysis of high-speed data links is mathematically formulated. Since input test patterns for eye boundaries are determined analytically, it is considered very convenient and efficient. The proposed technique shows excellent agreement with the SPICE-based simulation in both eye height and jitter, i.e., within 5% error for nondiscontinuous data paths and 10% error for discontinuous data paths. The method is much more computation-time-efficient than the pseudorandom bit sequence-based SPICE simulation in the order of magnitude.-
dc.format.extent10-
dc.language영어-
dc.language.isoENG-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleAnalytical Eye-Diagram Determination for the Efficient and Accurate Signal Integrity Verification of Single Interconnect Lines-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TCAD.2012.2196277-
dc.identifier.scopusid2-s2.0-84866608292-
dc.identifier.wosid000308969600006-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.31, no.10, pp 1536 - 1545-
dc.citation.titleIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS-
dc.citation.volume31-
dc.citation.number10-
dc.citation.startPage1536-
dc.citation.endPage1545-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClasssci-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryComputer Science, Interdisciplinary Applications-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusTRANSMISSION-LINES-
dc.subject.keywordPlusDESIGN-
dc.subject.keywordPlusSIMULATION-
dc.subject.keywordPlusJITTER-
dc.subject.keywordAuthorEye diagram-
dc.subject.keywordAuthorintersymbol interference (ISI)-
dc.subject.keywordAuthorjitter-
dc.subject.keywordAuthorsignal integrity-
dc.subject.keywordAuthortransmission line-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/6303934-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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