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Reduction of Charge Trapping in HfO2 Film on Ge Substrates by Atomic Layer Deposition of Various Passivating Interfacial Layers

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dc.contributor.authorJung, Hyung-Suk-
dc.contributor.authorYu, Il-Hyuk-
dc.contributor.authorKim, Hyo Kyeom-
dc.contributor.authorLee, Sang Young-
dc.contributor.authorLee, Joohwi-
dc.contributor.authorChoi, Yujin-
dc.contributor.authorChung, Yoon Jang-
dc.contributor.authorLee, Nae-In-
dc.contributor.authorPark, Tae Joo-
dc.contributor.authorChoi, Jung-Hae-
dc.contributor.authorHwang, Cheol Seong-
dc.date.accessioned2021-06-23T06:52:31Z-
dc.date.available2021-06-23T06:52:31Z-
dc.date.created2021-01-21-
dc.date.issued2012-09-
dc.identifier.issn0018-9383-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/32167-
dc.description.abstractThe dielectric performance and charge trapping properties of HfO2 on a Ge substrate with various passivating interfacial layers (PILs), such as SiOxNy, AlOxNy, HfOxNy, and LaOxNy, are investigated. The large capacitance-voltage (C-V) hysteresis of HfO2 on a Ge substrate (similar to 1500 mV) was not improved by inserting either HfOxNy or LaOxNy PIL between the HfO2 and Ge substrates, while both SiOxNy and AlOxNy PILs induced a noticeable reduction of C-V hysteresis. As the PILs' thicknesses increased, the C-V hysteresis of HfO2 with SiOxNy PIL decreased to almost zero, while that of HfO2 with AlOxNy PIL decreased but was saturated at approximately 400 mV. Furthermore, the charge trapping property of HfO2 with SiOxNy PIL on a Ge substrate is comparable to that of HfO2 grown on a Si substrate. Negligible C-V hysteresis and negligible charge trapping of HfO2 with SiOxNy PIL were understood from the fact that SiOxNy is more resistant to react with a Ge substrate and defective Ge suboxides are efficiently suppressed during the formation of SiOxNy PIL and HfO2 layers.-
dc.language영어-
dc.language.isoen-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleReduction of Charge Trapping in HfO2 Film on Ge Substrates by Atomic Layer Deposition of Various Passivating Interfacial Layers-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, Tae Joo-
dc.identifier.doi10.1109/TED.2012.2204996-
dc.identifier.scopusid2-s2.0-84865451609-
dc.identifier.wosid000307905200012-
dc.identifier.bibliographicCitationIEEE Transactions on Electron Devices, v.59, no.9, pp.2350 - 2356-
dc.relation.isPartOfIEEE Transactions on Electron Devices-
dc.citation.titleIEEE Transactions on Electron Devices-
dc.citation.volume59-
dc.citation.number9-
dc.citation.startPage2350-
dc.citation.endPage2356-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusTHERMAL-STABILITY-
dc.subject.keywordPlusGATE DIELECTRICS-
dc.subject.keywordPlusOXIDE-
dc.subject.keywordPlusCAPACITORS-
dc.subject.keywordPlusGE(100)-
dc.subject.keywordAuthorAtomic layer deposition (ALD)-
dc.subject.keywordAuthorgermanium (Ge)-
dc.subject.keywordAuthorhafnium oxide (HfO2)-
dc.subject.keywordAuthorhigh-k gate dielectrics-
dc.subject.keywordAuthorpassivation layer-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/6241410-
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ERICA 공학대학 (DEPARTMENT OF MATERIALS SCIENCE AND CHEMICAL ENGINEERING)
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