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CMOS IC 패키지의 스위칭 특성 해석 및 최적설계
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 어영선 | - |
| dc.date.accessioned | 2021-06-23T08:12:28Z | - |
| dc.date.available | 2021-06-23T08:12:28Z | - |
| dc.date.issued | 1998-11-21 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/34203 | - |
| dc.description.abstract | A new design methodology for the shortchannel CMOS IC-package is presented. It is developed by representing the package inductance with an effective lumped-inductance. | - |
| dc.title | CMOS IC 패키지의 스위칭 특성 해석 및 최적설계 | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | 대한전자공학회 추계 학술대회 | - |
| dc.citation.conferencePlace | 경북대 | - |
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Related Researcher
- EO, YUNG SEON
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)