Low-Power Fast-Transient Capacitor-Less LDO Regulator With High Slew-Rate Class-AB Amplifier

Abstract

This brief presents a low-power fast-transient capacitor-less low-dropout regulator (CL-LDO) for system-ona- chip applications. A low-quiescent-current class-AB amplifier with embedded slew-rate enhancement (SRE) circuit is proposed to improve both current efficiency and load transient performance. As the SRE circuit is directly controlled by the amplifier, only a minimum hardware overhead is required. The proposed CL-LDO is fabricated in a 0.18-mu m standard CMOS process. It occupies an active area of 0.031 mm(2) and consumes a quiescent current of 10.2 mu A. It is capable of delivering a maximum load current of 100 mA at 1.0-V output from a 1.2-V power supply. The measured results show that a settling time of 0.22 mu s is achieved for load steps from 1 mA to 100 mA (and vice versa) with an edge time of 0.1 mu s.