Low-Power Fast-Transient Capacitor-Less LDO Regulator With High Slew-Rate Class-AB Amplifier
- Authors
- Tang, Jun; Lee, Jaeseong; Roh, Jeongjin
- Issue Date
- Mar-2019
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- High slew-rate (SR); capacitor-less low-dropout regulator (CL-LDO); low-power; fast-transient
- Citation
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.3, pp 462 - 466
- Pages
- 5
- Indexed
- SCI
SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Volume
- 66
- Number
- 3
- Start Page
- 462
- End Page
- 466
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/3456
- DOI
- 10.1109/TCSII.2018.2865254
- ISSN
- 1549-7747
1558-3791
- Abstract
- This brief presents a low-power fast-transient capacitor-less low-dropout regulator (CL-LDO) for system-ona- chip applications. A low-quiescent-current class-AB amplifier with embedded slew-rate enhancement (SRE) circuit is proposed to improve both current efficiency and load transient performance. As the SRE circuit is directly controlled by the amplifier, only a minimum hardware overhead is required. The proposed CL-LDO is fabricated in a 0.18-mu m standard CMOS process. It occupies an active area of 0.031 mm(2) and consumes a quiescent current of 10.2 mu A. It is capable of delivering a maximum load current of 100 mA at 1.0-V output from a 1.2-V power supply. The measured results show that a settling time of 0.22 mu s is achieved for load steps from 1 mA to 100 mA (and vice versa) with an edge time of 0.1 mu s.
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