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온 칩 통신을 위한 저 전력 동기화 기술Low-Power Synchronization Technique for On-Chip Communication

Other Titles
Low-Power Synchronization Technique for On-Chip Communication
Authors
이정현김동철어영선
Issue Date
Oct-2011
Publisher
대한전자공학회
Keywords
source-synchronization; low-power synchronization; power consumption
Citation
전자공학회논문지 - SD, v.48, no.10, pp 33 - 38
Pages
6
Indexed
KCI
Journal Title
전자공학회논문지 - SD
Volume
48
Number
10
Start Page
33
End Page
38
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/38803
ISSN
1229-6368
Abstract
본 논문에서는 로컬에서의 동기화를 위한 새로운 저 전력 동기화 기술을 제안하였다. 본 논문에서 제안하고 있는 저 전력동기화 기술은 현재 널리 이용되고 있는 소스 동기화 방법과 비교하여 클록을 전송하는 대신 인에이블 신호를 전송하여 동기화를 함으로써 소스 동기화 방법의 장점과 데이터 전송속도는 그대로 유지하면서 동기화를 위한 회로와 배선에서 소모되는 전력을 50%이상 감소시킨다.
A novel low-power synchronization technique is presented for the local synchronization. Since the proposed technique transmits an enable signal instead of a clock signal which consumes large power, it can considerably reduce the power consumption. The source-synchronization scheme which is widely adopted for the local synchronization is compared with the proposed technique. It is shown that the proposed low-power synchronization technique provides approximately 50% power saving.
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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