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SRAM cell reliability degradations due to cell crosstalk

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dc.contributor.authorBae, Jongsun-
dc.contributor.authorBaeg, Sanghyeon-
dc.contributor.authorWen, Shijie-
dc.contributor.authorWong, Rick-
dc.date.accessioned2021-06-23T14:07:21Z-
dc.date.available2021-06-23T14:07:21Z-
dc.date.issued2010-10-
dc.identifier.issn1930-8841-
dc.identifier.issn2374-8036-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/40474-
dc.description.abstractThe capacitance between adjacent SRAM cells due to defectivity can increase in smaller geometry technologies. However, the abnormal behaviors due to such defective capacitance in SRAM are often neglected and can cause NTF (No Trouble Found) failures. The effective testing or calibration methods for such capacitance due to defects are not easily available in today's manufacturing. In this paper, a 3-D field solver was used to see the potential ranges of the defective capacitance. The crosstalk AC current through the coupling capacitance, which is referred to as cell coupling capacitor (CCCP) is newly modeled as a current source to build modified SNM (Static Noise Margin). The two metrics, SNM and VDDMIN show that the reliability under the CCCP can be significantly degraded during memory operations. Even with a marginal CCCP, SNM variation is 40mV at a read operation and VDDMIN shift is 110mV at a write operation in a 65nm SRAM cell. © 2010 IEEE.-
dc.format.extent4-
dc.language영어-
dc.language.isoENG-
dc.publisherIEEE-
dc.titleSRAM cell reliability degradations due to cell crosstalk-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/IIRW.2010.5706505-
dc.identifier.scopusid2-s2.0-79952424072-
dc.identifier.bibliographicCitationIEEE International Integrated Reliability Workshop Final Report, pp 129 - 132-
dc.citation.titleIEEE International Integrated Reliability Workshop Final Report-
dc.citation.startPage129-
dc.citation.endPage132-
dc.type.docTypeConference Paper-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordPlusAbnormal behavior-
dc.subject.keywordPlusAC currents-
dc.subject.keywordPlusCalibration method-
dc.subject.keywordPlusCell coupling-
dc.subject.keywordPlusCoupling capacitance-
dc.subject.keywordPlusCurrent sources-
dc.subject.keywordPlusDefectivity-
dc.subject.keywordPlusEffective testing-
dc.subject.keywordPlusMemory operations-
dc.subject.keywordPlusNo trouble found-
dc.subject.keywordPlusPotential range-
dc.subject.keywordPlusRead operation-
dc.subject.keywordPlusReliability degradation-
dc.subject.keywordPlusSRAM Cell-
dc.subject.keywordPlusStatic noise margin-
dc.subject.keywordPlusWrite operations-
dc.subject.keywordPlusCrosstalk-
dc.subject.keywordPlusReliability-
dc.subject.keywordPlusStatic random access storage-
dc.subject.keywordPlusCapacitance-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/5706505-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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