A Physics-Based Compact Model of III-V FETs for Digital Logic Applications: Current-Voltage and Capacitance-Voltage Characteristics
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Oh, Saeroonter | - |
dc.contributor.author | Wong, H. -S. Philip | - |
dc.date.accessioned | 2021-06-23T14:40:21Z | - |
dc.date.available | 2021-06-23T14:40:21Z | - |
dc.date.created | 2021-01-21 | - |
dc.date.issued | 2009-12 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/40636 | - |
dc.description.abstract | A physics-based analytical compact model of InGaAs field-effect transistors (FETs) for digital logic applications is developed. This model neither heavily depends on parameter extraction nor requires any time-consuming computation while capturing the essential physics, enabling digital circuit design and circuit-level performance estimation for III-V FETs. The model captures short channel effects, trapezoidal-shape quantum-well energies, bias-dependent ballistic ratios, and capacitances including 2-D potential profile information. Each is verified via numerical calculations and 2-D electrostatic simulation, followed by a comparison of the model I-V characteristics with experiment data. Finally, the transient response of FO4 inverters demonstrates the use of the compact model for future technology circuit simulations. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Physics-Based Compact Model of III-V FETs for Digital Logic Applications: Current-Voltage and Capacitance-Voltage Characteristics | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Oh, Saeroonter | - |
dc.identifier.doi | 10.1109/TED.2009.2033411 | - |
dc.identifier.scopusid | 2-s2.0-84859893394 | - |
dc.identifier.wosid | 000271951700006 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.56, no.12, pp.2917 - 2924 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 56 | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 2917 | - |
dc.citation.endPage | 2924 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | SCATTERING | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.subject.keywordPlus | SIMULATION | - |
dc.subject.keywordPlus | CHANNEL | - |
dc.subject.keywordPlus | MOSFETS | - |
dc.subject.keywordPlus | DEVICE | - |
dc.subject.keywordPlus | LENGTH | - |
dc.subject.keywordPlus | SPEED | - |
dc.subject.keywordAuthor | Compact model | - |
dc.subject.keywordAuthor | digital logic | - |
dc.subject.keywordAuthor | III-V field-effect transistor (FET) | - |
dc.subject.keywordAuthor | InGaAs | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/5306171 | - |
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