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A Modeling Approach of Spatially Distributed Defects in a Semiconductor Manufacturing

Authors
Bae,Suk JooJeong, In-JaeKANG, CHANG WOOK
Issue Date
May-2005
Publisher
한국산업경영시스템학회
Keywords
Integrated Circuits (ICs); Spatial clustering; Zero-inflated Poisson (ZIP) regression; Yield
Citation
한국산업경영시스템학회 학술대회 한국산업경영시스템학회 2005 춘계학술대회 논문집, pp.111 - 115
Indexed
OTHER
Journal Title
한국산업경영시스템학회 학술대회 한국산업경영시스템학회 2005 춘계학술대회 논문집
Start Page
111
End Page
115
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/45947
Abstract
The need for accurate yield prediction is increasing for estimating productivity and production costs to secure high revenues in the semiconductor industry. Corresponding to this end, we introduce new spatial modeling approaches for spatially clustered defects on an integrated circuit (IC) wafer map. We use spatial location of an IC chip on the wafer as a covariate on corresponding defects count listed in a wafer map. Analysis results indicate that yield prediction can be greatly improved by capturing spatial features of defects. Tyagi and Bayoumi's (1994) wafer map data are used to illustrate the procedure.
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COLLEGE OF ENGINEERING SCIENCES > DEPARTMENT OF INDUSTRIAL & MANAGEMENT ENGINEERING > 1. Journal Articles

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